photo #5244444

Silicon-oxide-memristors Self-assembled silicon oxide memristors. Lamella-forming and sphere-forming block copolymers were used for preparing thin film and nanodot memristors, respectively. Current (I)−voltage (V) measurement results for the metal/ oxide/metal samples and reliability -Pt/SiOx nanodot/Pt[62]. (b) The gate-controlled BLG-based RRAM. The device structure of the GC-GRRAM and the main process flow of the GC-GRRAM[70]. (c) Structure of grapheme-based and Pt-based RRAM in a vertical 3D cross-point architecture. An illustration of graphene-based RRAM in a vertical cross-point architecture. The RRAM cells are formed at the intersections of the TiN pillar electrode and the graphene plane electrode. The resistive switching HfO x layer surrounds the TiN pillar electrode and is also in contact with the graphene plane electrode. A schematic cross-section of the graphene-based RRAM with I-V curve[71].S